Frequency response-compensated circuit

ABSTRACT

A frequency compensated circuit includes a frequency compensation component and a negative feedback loop for feeding an output signal to the circuit input terminal. The circuit input terminal also receives a compensation signal from the frequency compensation component. A controlled system provides an output signal to the input terminal. A controlled current is supplied to the controlled system to increase the output voltage and the compensation signal from the compensation component can be substantially lower than it is in the prior art type of systems.

This is a continuation of PCT application PCT/EP 90/02221 filed Dec. 18,1990 by Rudolf Koblitz and Steffan Lehr and titled "FrequencyResponse-Compensated Circuit".

This invention is directed to a frequency response compensated circuitfor a control loop. The direct voltage gain of an operational amplifier,which is constructed as shown in FIG. 1, has an output voltage V_(out)where: V_(out) =V_(in) * R₁ /R₁₀. Internally, such an integratedoperational amplifier mainly consists of transistors and resistors.Coupling capacitances, so-called parasitic capacitances, exist betweenthe connecting wires and base, collector, emitter of the transistors andthe ground substrate. These parasitic capacities cause progressivelyreduced inverse feedback in the higher frequency ranges so that the highfrequency gain compared with the direct voltage gain, markedlydiminishes. The phase response also changes with increasing frequency.Above a certain frequency, for example, 10 MHz, the phase shift exceeds180 degrees and uncontrollable oscillations result, because the gain isstill larger than one. These oscillations are avoided by installing afrequency response compensation capacitor at a suitable point within theoperational amplifier. This capacitor causes the shift to stay within acertain frequency range of 90 degrees and the gain diminishes morerapidly. When the phase shift at higher frequencies ultimately reaches180 degrees the gain has already fallen to less than one and thedisturbing oscillations do not occur. The higher the gain is, thegreater the frequency response which must be compensated. However, thecapacitor used to provide the frequency response compensation withinintegrated circuits requires a relatively larger chip surface, forexample, 0.001 sq mm/pF. That means a capacitor of 1,000 pF wouldrequire an area of 1 sq min.

A regulating circuit which is frequency response compensated by means ofa capacitor is described in U.S. Pat. No. 3,984,780. In order to achievehigh regulating accuracy, the internal amplification, and thus also thecapacitor must be large.

It is an object of the present invention to generate precise currentsusing a regulating circuit and to reduce the capacitance required forthe frequency response compensation capacitor in the regulating circuit.

The invention is described with reference to the drawings in which:

FIG. 1 is a prior art operational amplifier.

FIG. 2 is a prior art operational amplifier using reduced inversefeedback.

FIG. 3 is a prior art circuit for generating a precise current with anoperational amplifier in the control loop.

FIG. 4 is a prior art circuit for generating an approximately precisecurrent.

FIG. 5 is a preferred embodiment of inventive circuit for generating aprecise current.

FIG. 6 is a prior art representation of a control loop.

FIG. 7 is a representation of a control loop according to the invention.

FIG. 8 is circuit diagram of a temperature compensated power supply.

The wiring of a negative feedback operational amplifier is shown inFIG. 1. The gain of the amplifier is: V_(out) =V_(in) * R₁ /R₁₀.

The wiring of a negative feedback operational amplifier having reducedinverse feedback is shown in FIG. 2. In FIGS. 1 and 2 capacitor C is thecapacitor used for the frequency response compensation component.

In the prior art circuit shown in FIG. 3, resistors R₃₀ and R₃₁ have thesame resistance value. The voltage drop across resistors R₃₀ and R₃₁ isone half of the input voltage V_(CC) because the non-inverted inputterminal of the operational amplifier OP₃₀, which is connected to thejunction of R₃₀ and R₃₁, is high in comparison to resistors R₃₀ and R₃₁.Resistor R₃₂ is a reference resistor with a resistance value of, forexample, 50 kOhm. Transistor T₃₀ is a current mirror. The junction ofresistor R₃₂ and the collector of transistor T₃₂, is connected to theinverting input terminal of operational amplifier OP₃₀. Accordingly, areference current I₃₀ =(V_(CC) /2)/R₃₂ flows into the collector of T₃₂.An equal current I₃₁ =I₃₀ builds up at the collector of transistor T₃₀.A current I₃₂ =(R₃₅ /R₃₂) * (V_(CC) /2) builds up through resistor R₃₅by using the current mirror function of transistor T₃₀ and the resistorR₃₅.

The capacitor C₃₀ of the operational amplifier OP₃₀ serves as thefrequency response compensation component to regulate the referencecurrent I₃₀. Capacitor C₃₀ must have a relatively high value andtherefore a large chip area is required. The currents I₃₀, I₃₁, I₃₂ aredetermined by the supply voltage V_(CC). Because the supply voltageV_(CC) can be very precise, the currents I₃₀ and through I₃₂ arecorrespondingly precise.

FIG. 4 shows another prior art circuit which is used to generateaccurate currents. Resistor R₄₂ is a reference resistor and transistorT₄₀ is a current mirror. The resulting current I₄₃ is I₄₃ =(V_(CC)-2*VBE)/R₄₂. The base emitter voltage VBE is temperature-dependent andtherefore the current I₄₃ is, likewise, temperature-dependent. VoltageVBE changes by about 200 mV in the temperature range 0-100 degrees C.However, the circuit complexity is substantially reduced compared to theFIG. 3 circuit. In particular, the chip area needed for the capacitorC₃₀ is substantially reduced for the FIG. 4 circuit.

FIG. 5 shows a preferred embodiment of a circuit which generatesaccurate currents but has: a substantially reduced chip area for thefrequency response compensation capacitor. The circuitry to the left ofthe connection points A and B in FIG. 3, which consists of the resistorsR₃₀ and R₃₁, the operational amplifier OP₃₀ and the capacitor C₃₀, isconnected to points A and B of FIG. 5. Resistors R₅₁ and R₅₄ have thesame value and are reference resistors. Transistor T₅₀ is a currentmirror and the reference current is current I₅₃. Additional exactlyequal reference currents, for example, I₅₉, build up at additionaltransistors, for example T₅₉, the base terminals of which are connectedto the base of transistor T₅₃. The resistors R₅₁, R₅₃, R₅₅ in FIG. 5correspond to the resistors R₄₂, R₄₃, R₄₄, respectively in FIG. 4 andthe transistors T₅₀, T₅₂ T₅₃ in FIG. 5 correspond to the transistorsT₄₀, T₄₂, T₄₃, respectively in FIG. 4. Accordingly, the referencecurrent I₅₃ is preset to correspond to the reference current I₄₃. Thefine adjustment is assumed by the operational amplifier OP₃₀, which isconnected to the terminals A and B. The OP₃₀ must only readjust thetemperature-dependent variations caused by VBE variations of transistor53. Accordingly, the range of control of OP₃₀, and hence also, theinverse feedback (as described with reference to. FIG. 2), issubstantially reduced. This reduction occurs because the output of OP₃₀is not directly connected to the emitter of T₅₂, instead the connectionis made via the emitter follower T₅₁ and a resistor R₅₂. The resistorR₅₂ is large and has, for example, a value R₅₂ =10 * R₅₃. Accordingly,capacitor C₃₀ can be reduced by a factor of 10 and, for example, have avalue of 5 pF instead of 50 pF.

The three additional transistors and the three additional resistorsrequire a chip area which is, for example, approximately equal to thearea of a 2 pF capacitor. It can be seen that because of the reductionof capacitor C from 50 pF to 5 pF, a substantial reduction in the chiparea required for the whole regulating circuit is realized, despite theincreased number of components, when compared to the FIG. 3 circuit, andthe accuracy of the reference current I₅₃ as high as that of current I₃₀in FIG. 3.

The advantage of the invention can be appreciated from FIG. 6 and FIG.7. FIG. 6 shows a prior art control loop. The desired voltage value at69 is fed to a subtraction point 60. The feedback (actual) voltage valueat 63 is subtracted from the desired voltage value at 69. The result isfed via an error amplifier 61 to the control system 62 which suppliesthe feedback value as an output signal. Thus, capacitor C of theoperational amplifier OP₃₀ must compensate for the full currentvariation.

FIG. 7 shows a control loop according to the invention. The desiredvoltage value at 79 is fed to a subtraction point 70. The feedbackvoltage value at 73 is subtracted from the desired value at 79. Theresult is fed to an addition point 75 via an error amplifier 71 and amultiplier 74. At the addition point 75 a preadjustment control value 76is added to the voltage from multiplier 74 and the sum fed to thecontrol system 72, which supplies the feedback value as an outputsignal. The gain of the amplifier 71 is reduced by the addition of thepreadjustment control value 76. This happens in the multiplier 74through multiplication using a transmission value k; where k is lessthan one, for example, k=0.1 . . . 0.5. The frequency responsecompensation in the error amplifier 71 can be advantageously decreasedby a factor of 1/k through the reduction in the error gain.

The circuit shown in FIG. 18 supplies a current of 80 micro-amperes ateach of the output terminals 80-1/I, 80OU-2/I and 8OU-3/I, a current of50 micro-amperes at the output terminal 5OU/I and a current of 30micro-amperes at the output terminal 30U/I. A reference resistor R_(REF)is connected between the terminals V_(CC) /I and I_(REF) /I. Ifreference resistor R_(REF) is not used the temperature compensation forthe VBE variations must be somewhat increased. The transmission value Kis then also correspondingly somewhat higher. Transistor Q₁₂ correspondsto transistor T₅₁, resistor R₆ corresponds to resistor R₅₂, R₈ /R₉correspond to R₅₁, Q₁₆ corresponds to T₅₀, Q₁₄ corresponds to T₅₂, R₇corresponds to R₅₃, the reference resistor R_(REF) corresponds R₅₄, Q₁₈corresponds to T₅₃, R₁₂ corresponds to R₅₅, Q₂₄ and R₁₈ correspond toT₅₉ and R₅₆, respectively. The base terminals of Q₄ and Q₇ correspond tothe input terminals of OP₃₀, the collector terminals of Q₁₀ and Q₁₁correspond to the output terminal of OP₃₀ and the capacitor C₁corresponds to the capacitor C₃₀. Terminal GND/I is the ground terminal.A reference voltage of 1.2 V is connected to terminal VBG/I and theabove-mentioned outputs are switched by the terminal OFF/I.

Components Q₁₂, Q₁₄, Q₁₆, R₆, R₈ and R₉ are additional componentscompared to the circuit shown in FIG. 3. However, a substantial savingof chip area is realized by the substantial reduction in the physicalsize of capacitor C₁.

We claim:
 1. Apparatus comprising:a first source of a first referencesignal; an amplifier having first input coupled to said first source ofsaid first reference signal, a second input and an output; a frequencycompensation capacitor coupled to said amplifier for preventingoscillations of said amplifier; an output circuit; said amplifier beingcoupled in a forward path between said first source and an output ofsaid forward path; a feedback path coupled between said output of saidforward path and said second input of said amplifier; a second source ofa second reference signal coupled to said forward path between theoutput of said amplifier and the output of said forward path; and meanscoupled between said output of said amplifier and said second input ofsaid amplifier for reducing the loop gain of the combination of saidforward path and said feedback path.
 2. The apparatus recited in claim1, wherein:said means for reducing the loop gain is coupled between saidoutput of said amplifier and said output of said forward path.
 3. Theapparatus recited in claim 2, wherein:said second source is coupled tosaid means for reducing the loop gain.
 4. The apparatus recited in claim3, wherein:said means for reducing said loop gain includes a , resistivevoltage divider including first and second resistors.
 5. The apparatusrecited in claim 4, wherein:said second source is a source of areference current (T50, T52, R51 or Q14, Q16, R8, R9) and is coupled tosaid second resistor of said resistive voltage divider.
 6. The apparatusrecited in claim 5, wherein:said source of current includes a firsttransistor having a collector electrode coupled to a source of voltage,a base electrode coupled to said source of voltage through a resistor,and a emitter electrode; and a second transistor having a collectorelectrode coupled to said base electrode of said first transistor, abase electrode coupled to said emitter electrode of said firsttransistor, and an emitter electrode coupled to said second resistor. 7.The apparatus recited in claim 6, wherein:said means for reducing saidloop gain included an emitter-follower amplifier preceding saidresistive voltage divider.
 8. The apparatus recited in claim 1,wherein:said amplifier comprises an operational amplifier.